"Zabha": Byte & Halfword Atomics

Part III Linux boot: optional Vol. I (Unprivileged) p. 81 · ~2 min read

The A extension stops at words. Byte flags and halfword refcounts therefore got emulated — bitwise ops via wider AMOs (rewriting three innocent neighbor bytes), everything else via LR/SC loops. Four documented casualties: NUMA-scale fairness under contention, side effects on non-idempotent I/O regions, spurious watchpoint/breakpoint hits on the untouched bytes, and inlined emulation bloating code. Zabha (depends on Zaamo) simply completes the matrix:

The Zabha family — AMO opcode, existing funct5s, width via funct3 (000 = .B, 001 = .H)
Instructions & rules
AMO{SWAP,ADD,AND,OR,XOR,MIN,MAX,MINU,MAXU}.B/HIdentical semantics to their word cousins at 8/16 bits; aq/rl release consistency as usual; natural alignment (automatic for bytes).
AMOCAS.B/H (only with Zacas)Subword compare-and-swap; the upper bits of rd’s expected value are ignored.
Result conventionrd always receives the SIGN-extended loaded value (LB’s convention, not LBU’s); only the low 8/16 bits of rs2 participate.
Deliberate omissionNo LR.B/H or SC.B/H — judged low-utility once every AMO exists at subword width.
Dotted-underlined cells have explanations — click one.

Hardware Designer Notes

Cost is a rounding error on an existing AMO datapath: lane muxes and extend logic the load pipe already owns. The value shows up in qspinlock-style byte locks and C++ std::atomic<uint8_t> hitting native instructions instead of LR/SC loops.

Minimal Linux-boot hart MUST

  • Add byte/halfword lane steering to the AMO ALU path — the operation itself is the existing add/and/or/minmax logic on a narrowed lane, plus the sign-extend on writeback
  • Keep watchpoint/trigger matching exact to the accessed bytes — that precision is one of the extension’s selling points

MAY simplify / trap-and-emulate

  • Skip Zabha initially: Linux and glibc carry the emulation paths (it is RVA23-optional history — check your target profile), and no LR/SC subword support is ever needed
  • Reuse the load-unit’s existing subword extract/extend muxes for the AMO read side

Check yourself — Zabha

1.Before Zabha, a byte-wide atomic OR was emulated with a word-wide AMOOR. Which failure modes motivated native subword AMOs?

2.AMOADD.B loads 0x80 from memory on RV64. What lands in rd, and what of rs2 participates?

2 questions