Do you really need this primer?
It is easy to convince yourself that your working knowledge of consistency and coherence is already sufficient. The book’s counter-move is this pop quiz: eight true/false questions whose answers are all developed later in the primer (the section that settles each one is cited in its explanation).
Two suggestions before you start:
- Commit to an answer before clicking. The value of the quiz is in discovering which of your intuitions are miscalibrated — several of these questions are designed to trap plausible-sounding reasoning.
- Don’t worry about your score. Each explanation here is only a preview; the cited section gives the full argument. If any answer surprises you, that surprise is the reading list.
The pop quiz
1.Question 1: In a system that maintains sequential consistency, a core must issue coherence requests in program order. True or false?
2.Question 2: The memory consistency model specifies the legal orderings of coherence transactions. True or false?
3.Question 3: To perform an atomic read–modify–write instruction (e.g., test-and-set), a core must always communicate with the other cores. True or false?
4.Question 4: In a TSO system with multithreaded cores, threads may bypass values out of the write buffer, regardless of which thread wrote the value. True or false?
5.Question 5: A programmer who writes properly synchronized code relative to the high-level language's consistency model (e.g., Java) does not need to consider the architecture's memory consistency model. True or false?
6.Question 6: In an MSI snooping protocol, a cache block may only be in one of three coherence states. True or false?
7.Question 7: A snooping cache coherence protocol requires the cores to communicate on a bus. True or false?
8.Question 8: GPUs do not support hardware cache coherence; therefore, they are unable to enforce a memory consistency model. True or False?
A spoiler-free scorecard
If you breezed through all eight with confident, correct reasoning — not just lucky guesses — you may indeed be the rare reader who could skim parts of this primer. If any answer surprised you, note the pattern: most of the traps come from blurring the line between the consistency model (the architectural specification, in terms of loads and stores) and the coherence machinery (an implementation mechanism underneath it) — the distinction drawn in §1.1 and §1.2. Holding that line firmly is arguably the single most useful habit this book teaches.