Β§44.4–44.7Flash Performance, the FTL, and Log-Structuring

Part III OSTEP pp. 567–571 Β· ~7 min read

  • wear out
  • flash translation layer
  • write amplification
  • wear leveling
  • log-structured ftl
  • direct-mapped ftl

Now that we know how raw flash behaves, we can build an actual SSD out of it.

44.4 Performance and Reliability

The raw operations have very different costs, and packing more bits per cell slows them further:

Figure 44.2: rough raw-flash operation latencies. Reads are cheap; erases are ~100Γ— costlier and hit a whole block.
read a page (Β΅s)program a page (Β΅s)erase a block (Β΅s)
SLC25200–3001500–2000
MLC50600–900~3000
TLC~75~900–1350~4500
Dotted-underlined cells have explanations β€” click one.

The main reliability worry is wear out : every program/erase (P/E) cycle leaves a little extra charge in a block, until 0 and 1 can no longer be told apart and the block dies (rated ~10,000 P/E cycles for MLC, ~100,000 for SLC). There’s also disturbance β€” reading or programming a page can flip bits in neighbors.

44.5 From Raw Flash to an SSD: The FTL

An SSD wraps flash chips (plus some volatile SRAM and control logic) behind the standard block interface. The brains is the flash translation layer (FTL) , which turns client reads/writes on logical blocks into low-level read/erase/program on physical pages:

hostreads/writesthe SSDcontrollerthe FTLmemory (SRAM)cache + mapping tableflash chipflash chipflash chipflash chip

Two FTL goals drive everything: keep performance high (use many chips in parallel and minimize write amplification β€” the flash write traffic issued divided by the client write traffic), and keep reliability high via wear leveling (spread erases evenly so all blocks wear out together, not a few hot ones early).

44.6 A Bad FTL: Direct-Mapped

The simplest FTL β€” direct-mapped β€” maps logical page N straight to physical page N. Reads are fine, but every write must read the whole containing block, erase it, then re-program all its pages plus the new one. That’s enormous write amplification (proportional to pages per block), write performance worse than a disk, and β€” because a repeatedly-overwritten logical block hammers the same physical block β€” rapid wear out. A bad idea on both counts.

44.7 A Log-Structured FTL

So most FTLs are log-structured β€” the very idea from LFS, now inside the device. On a write to logical block N, the FTL just appends the data to the next free page and records N β†’ physical-page in a mapping table:

A log-structured FTL turns client writes into sequential programs, recording each logical→physical mapping. Client writes: Write(100)=a1, Write(101)=a2, Write(2000)=b1, Write(2001)=b2.
block 0i0i1i2i3block 1i4i5i6i7mapping table(empty)nothing written yet

1Empty device, empty map

All pages are INVALID and the mapping table is empty. The client will write logical blocks 100, 101, 2000, and 2001.

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This is a huge win: random client writes become sequential programs (erasing only occasionally), the costly read-modify-write is gone, and wear is spread across pages. The mapping table (kept in SRAM, and persisted β€” e.g. in each page’s out-of-band area β€” so it survives power loss) is the FTL’s version of LFS’s inode map. But log-structuring brings the same two costs LFS had: garbage from overwrites, and a potentially huge mapping table β€” the subjects of the next page.

Check yourself: flash reliability and the FTL

1.How do the raw flash operation costs compare?

2.What is flash 'wear out'?

3.What does the flash translation layer (FTL) do?

4.What is write amplification, and why minimize it?

5.Why is a direct-mapped FTL (logical page N β†’ physical page N) a bad idea?

6.How does a log-structured FTL work, and why is it better?

6 questions