CPU virtualization ran on limited direct execution: let the program run directly on the hardware, but interpose at key moments to keep control. Memory virtualization pursues the same bargain β efficiency (with hardware help, starting from just a few registers), control (no process touches memory that isnβt its own), plus one new demand: flexibility β programs should use their address spaces however they like.
The Crux: How To Efficiently And Flexibly Virtualize Memory
How can we build an efficient virtualization of memory? How do we provide the flexibility needed by applications? How do we maintain control over which memory locations an application can access? How do we do all of this efficiently?The generic technique β the addition to LDE β is hardware-based address translation address translation Hardware transforming every memory reference's virtual address into a physical one β LDE's memory-side twin. defined in ch. 15 β open in glossary : on each and every memory reference (instruction fetch, load, or store), the hardware transforms the virtual address into the physical address where the data actually lives. Hardware provides the fast mechanism; the OS manages memory (tracking free and used) and steps in at the key moments. The goal, as ever: the beautiful illusion of private memory, hiding the ugly truth of many programs sharing it.
Tip: Interposition is powerful
Interposition interposition Inserting machinery at a well-defined interface (here: every memory access) to add functionality transparently. defined in ch. 15 β open in glossary β inserting yourself at a well-defined interface β is a broadly applicable systems technique. Here the hardware interposes on every memory access to translate it; in general, almost any interface can be interposed upon to add functionality, usually with the bonus of transparency: the client neednβt change at all.15.1 Assumptions
First attempts will be simple β βlaughably so. Go ahead, laugh all you want; pretty soon it will be the OS laughing at you, when you try to understand the ins and outs of TLBs and multi-level page tables. Thatβs just how the OS rolls.β
THREE (TEMPORARY) ASSUMPTIONS
- Each address space is placed contiguously in physical memory (relaxed by segmentation, ch. 16)
- Every address space is smaller than physical memory (relaxed by swapping, ch. 21)
- All address spaces are exactly the same size (relaxed almost immediately, ch. 16β17)
15.2 An Example
Take the humblest line of C and watch what memory work it causes:
void func() {
int x = 3000; // thanks, Perry.
x = x + 3; // line of code we are interested in
...
The compiler emits three x86 instructions (disassemble with objdump
on Linux, otool on a Mac). The address of x waits in %ebx:
128: movl 0x0(%ebx), %eax ;load 0+ebx into eax
132: addl $0x03, %eax ;add 3 to eax register
135: movl %eax, 0x0(%ebx) ;store eax back to mem
Hereβs where everything lives in the processβs 16KB view:
click a region marked β for details
Running those three instructions produces six memory accesses, from the processβs perspective:
| # | access | virtual address | why |
|---|---|---|---|
| 1 | fetch | 128 | the movl instruction itself |
| 2 | load | 15KB | read x (3000) |
| 3 | fetch | 132 | the addl instruction |
| β | execute | β | register-only: no memory reference |
| 4 | fetch | 135 | the second movl |
| 5 | store | 15KB | write 3003 back to x |
(Instruction fetches count! Chapter 2 warned that memory is touched on every fetch β here itβs 3 of the 5 accesses.)
Now the problem. The program believes its space runs 0β16KB, and every reference it generates will be in that range. But the OS wants to place it somewhere else β say at physical 32KB:
click a region marked β for details
How can the process be relocated transparently β the illusion of an address space at 0, while the truth is 32KB? Every one of those six accesses must be quietly redirected, at full speed. The 1950s answer β two little registers β is next.
Check yourself
1.How is address translation the memory-side twin of limited direct execution?
2.Executing the three instructions of x = x + 3 causes how many memory accesses?
3.Which of these is one of the chapter's three (temporary) simplifying assumptions?
4.The process is placed at physical 32KB but generates addresses 0β16KB. State the core problem this chapter must solve.