Reconfigurable Torus Fabrics for Multi-tenant ML

Abhishek Vijaya Kumar, Eric Ding, Arjun Devraj, Darius Bunandar and Rachee Singh

Big ML training clusters wire their accelerators into a fixed torus — a grid with wrap-around links — because direct connections give fast collective communication, but that rigidity hurts when many tenants share the cluster — a tenant given fewer chips than a full rack can use only a fraction of each chip's bandwidth, free chips scatter into unusable fragments, and one chip failure disrupts a whole slice; this paper (Cornell — Abhishek Vijaya Kumar, Eric Ding, Arjun Devraj, Darius Bunandar, Rachee Singh) presents Morphlux, a server-scale programmable photonic fabric that puts accelerators on an optical interposer whose links can be reprogrammed on the fly, so its software can redirect idle bandwidth to a tenant, stitch scattered chips into a contiguous logical slice, and optically swap a failed chip for a healthy one in 1.2 seconds — lifting tenant bandwidth by up to 66 percent, cutting fragmentation by up to 70 percent, and improving training throughput 1.72 times.

The argument in one glance

Problem

The fixed torus that makes ML training fast makes sharing it inefficient

Large ML training clusters wire their accelerators directly to each other in a torus — a grid where opposite edges wrap around — because direct connections, with no packet switches in the middle, give the fast, predictable collective communication (AllReduce, AllToAll) that distributed training lives on. Google and Amazon build datacenters this way. The trouble is that the wiring is physical and static, while the cluster is shared among many tenants who each get a slice of accelerators. When you carve a fixed torus into slices, the rigidity bites: a slice smaller than a full rack cannot use all the bandwidth its chips have, free chips end up scattered in ways that cannot be handed out, and a single chip failure ripples outward. The very structure that makes the fabric fast for one big job makes it wasteful and fragile when it must be divided among many.
What people did

Statically partition the torus and connect racks with optical circuit switches

State-of-the-art fabrics do allow some reconfiguration at the rack level: optical circuit switches connect racks and can be programmed to stitch several racks into a larger torus, or to route the wrap-around links. Within a rack, accelerators form a fixed torus (for example a four-by-four-by-four grid), and tenants are given slices that are contiguous sub-blocks of this torus, partitioned along its three dimensions.
Why it fell short

Rack-level switching leaves three multi-tenant problems unsolved

Because the fabric is only reconfigurable between racks, not within them, three limitations remain. First, bandwidth under-utilization: a tenant slice smaller than a full torus rack is statically partitioned, so its accelerators can only use a fraction of their egress bandwidth — the links that would have gone to neighbors outside the slice sit idle — which slows collective communication and training. Second, compute fragmentation: since slices must be contiguous blocks of the torus, a stream of allocations and deallocations leaves free accelerators scattered in shapes that cannot satisfy new requests, so requests are refused even when enough chips are free in total. Third, high blast radius: when an accelerator fails, a static torus cannot cleanly route around it, so the failure disrupts a whole slice and can cause contention for other tenants. Rack-scale switching cannot reach inside the server to fix any of these.
This paper's idea

Make the links inside the server programmable with photonics

Morphlux is a server-scale programmable photonic fabric that connects accelerators within a server using reconfigurable optical links instead of fixed electrical ones. The accelerators sit on a wafer-scale optical interposer, with silicon photonic waveguides providing the connections, and those connections can be programmed to redirect an accelerator's egress bandwidth along whichever link needs it. This programmability, driven by a software orchestrator, resolves all three limitations. A resource allocator redirects idle bandwidth so a small slice's accelerators use their full egress bandwidth, ending under-utilization. A fragmented slice allocator builds a contiguous logical topology out of physically scattered accelerators by wiring them together optically, cutting fragmentation. And in-place fault tolerance optically reconnects a healthy or spare chip to logically replace a failed one within the same rack, so a failure is routed around without disturbing other tenants, shrinking its blast radius. A hardware control plane turns the logical connectivity these components compute into physical optical circuits. On a hardware prototype, Morphlux improves tenant bandwidth by up to 66 percent, reduces fragmentation by up to 70 percent, raises training throughput by 1.72 times, and replaces a failed accelerator in 1.2 seconds.

Why this problem is worth solving

The network fabric is now a first-order determinant of how fast and how economically a large model can be trained.

Distributed training of a large model splits the work across many accelerators that must constantly exchange data — averaging gradients with AllReduce, shuffling activations with AllToAll — and these collective operations sit on the critical path, so the interconnect between accelerators largely sets the training speed. To make collectives fast, cloud providers avoid general packet-switched networks for this traffic and instead wire the accelerators directly to one another in a torus: a multidimensional grid where each chip connects to its neighbors and the edges wrap around, so there are no switches to add latency and the bandwidth between neighbors is enormous. A rack might be a four-by-four-by-four torus of chips, and optical circuit switches can join racks into larger tori. On top of this physical fabric, the datacenter is multi-tenant: many customers run jobs at once, and each is given a slice, a subset of the accelerators, sized to its job. The provider wants to pack these slices tightly to keep the expensive hardware busy while giving each tenant the direct-connect bandwidth that makes the torus worthwhile. That combination — a rigid, high-performance physical topology and a fluid, unpredictable set of tenant slices laid over it — is where the tension this paper addresses lives, and getting it right is what determines both training performance and how much of the cluster can actually be sold.

The reason the static torus is so limiting is that a fixed shape cannot match a changing set of demands.

A torus delivers its full bandwidth when a job uses a whole, well-shaped block of it, because then every one of a chip’s links connects to another chip in the same job. But real multi-tenancy rarely offers that. When a tenant’s slice is smaller than a full rack, some of each chip’s links point at chips that belong to other tenants or to no one, and since the topology is static those links cannot be rerouted into the slice, so their bandwidth is simply wasted — the slice runs its collectives at a fraction of the possible speed. Over time, as tenants come and go, the free chips left behind form irregular, scattered patterns; but slices must be contiguous blocks to preserve the torus structure, so a request for a block-shaped slice can be refused even though plenty of chips are free, just not in the right shape — this is fragmentation, the same stranding that plagues memory allocators. And when a chip fails, a static torus has no way to substitute another chip without breaking the block’s shape, so the failure takes down the whole slice and forces rerouting that steals bandwidth from neighbors, giving a single failure a large blast radius. All three problems share one root cause: the topology is frozen, so it cannot adapt to which chips a tenant actually has. Making the topology reconfigurable is therefore the lever that addresses all of them at once, which is what makes it worth building new hardware to get.

What people did before, and where it broke

Static electrical torus within a rack. Wire accelerators directly in a fixed torus for fast, switch-free collectives. Where it broke. The fixed wiring cannot adapt to tenant slices, so small slices waste bandwidth, allocations fragment, and failures cannot be routed around inside the rack.
Rack-level optical circuit switches. Use programmable optical switches between racks to compose racks into larger tori or route wrap-around links. Where it broke. The reconfigurability stops at the rack boundary; it cannot reshape the links inside a server, so the three multi-tenant limitations remain untouched at the granularity where slices are actually carved.
Over-provision or pad tenant slices. Give tenants whole racks or extra chips to guarantee bandwidth and tolerate failures. Where it broke. This wastes expensive accelerators and worsens utilization, the opposite of the packing efficiency multi-tenancy is supposed to deliver.
Reserve spare chips inside the torus for failures. Keep idle chips in the rack to swap in when one fails. Where it broke. Reserving chips inside the torus distorts the rack’s topology and still cannot connect a spare to an arbitrary slice without reconfigurable links, so recovery is slow or disruptive.
The gap. No fabric made the interconnect programmable inside the server, so nothing could redirect an accelerator’s bandwidth, assemble a contiguous logical slice from scattered chips, or optically swap in a healthy chip on failure — the three things multi-tenant torus fabrics need.

How Morphlux works

Reconfiguring a torus fabric with programmable optics for multi-tenant ML

↓ →
new
↓ →
new
↓ →
new
↓ →
new
↓ →
new

The idea

Make the interconnect a variable, not a constant, by using light. The foundational move in Morphlux is to replace the fixed electrical wiring inside a server with programmable optical links, so the topology becomes something software can change rather than a property frozen at manufacturing time. Accelerators sit on a wafer-scale optical interposer, and silicon photonic waveguides carry the connections, which can be reprogrammed to send an accelerator’s bandwidth wherever it is needed. This is what turns the rigid torus into a reconfigurable one, and it is only practical because optical interposers have recently become commercially viable. Harnessing photonics as the substrate for computing and communication, exploiting what light can do that electrical wiring cannot, is the same bet the work on an agile design framework for diffractive optical systems covered elsewhere on this site makes, treating optics as a first-class engineering medium. Morphlux applies that medium specifically to the server-scale interconnect, so the shape of the network can follow the shape of demand.

Give every tenant the collective-communication bandwidth its job needs. With links programmable, Morphlux’s allocator no longer has to accept that a small slice wastes the bandwidth pointing outside it; it redirects that egress bandwidth back into the slice, so even a fraction of a rack can run its collectives at full speed. Because collectives sit on the critical path of distributed training, this directly lifts throughput. Making the communication that distributed training depends on as efficient as possible, so the accelerators spend their time computing rather than waiting on the network, is the same objective the work on efficient large-model training with parallelism-aware collective communication covered elsewhere on this site pursues, attacking the collective-communication bottleneck head on. Morphlux attacks it from the fabric side, reshaping the physical links so each tenant’s collectives get the bandwidth they need.

Defragment the cluster by wiring, not by waiting. The fragmentation problem is that free chips exist but not in the contiguous shape a slice requires, so capacity is stranded exactly as memory is stranded by a fragmenting allocator. Morphlux’s fragmented slice allocator dissolves this by programming optical connections to assemble a contiguous logical topology from physically scattered chips, so the provider can serve requests that a static fabric would have to refuse, raising how much of the cluster is usable. Pooling and reconnecting resources that would otherwise be stranded by rigid boundaries, so scattered free capacity becomes allocatable, is the same principle the work on CXL-based memory pooling for cloud platforms covered elsewhere on this site is built on, recovering stranded capacity by making the fabric flexible. Morphlux recovers stranded compute the same way, using programmable optics to turn discontiguous chips into a usable slice, and it reuses the same programmability to swap in a healthy chip on failure.

Following a tenant request through Morphlux

Allocating a slice, and surviving a chip failure, on a programmable torus

A trace, drawn from the paper, of how Morphlux serves a tenant and recovers from an accelerator failure using programmable optics.

Step 1 of 5

A tenant requests a slice of accelerators

A tenant asks for a block of accelerators to train a model. On a static torus, the provider must find a contiguous, well-shaped free block, or refuse; and if the block is smaller than a rack, its chips will waste bandwidth.

The static fabric forces a choice between packing tightly and giving full bandwidth.

Why it works

Programmable links turn wasted bandwidth into usable bandwidth. A small slice’s outward-pointing links sit idle on a static torus → but reprogrammable optics redirect that egress bandwidth into the slice → so the tenant’s collectives run at full speed instead of a fraction.
Logical topology decouples the slice shape from the physical layout. A static fabric needs a contiguous free block that often does not exist → but optically wiring scattered chips into a contiguous logical slice removes that constraint → so requests that would be refused are served, cutting fragmentation.
Optical replacement contains failures. A failed chip on a static torus breaks a slice and forces disruptive rerouting → but optically swapping in a healthy chip in place repairs the slice locally → so the blast radius shrinks to just the affected server.
Reconfiguration is fast enough to be operational. Fault tolerance is useless if recovery is slow → but programming the photonic fabric replaces a failed chip in 1.2 seconds → so failures are handled online rather than by tearing down and rescheduling the job.
The gains do not depend on faster links. One might think the benefits need production-speed optics → but the programmability improves utilization at any link speed and scales with it → so the same mechanisms deliver proportionally larger absolute gains on faster interconnects.

What it costs (trade-offs and scope)

It requires new photonic hardware. Morphlux depends on mounting accelerators on a wafer-scale optical interposer with programmable silicon photonic links, which is a substantial hardware change; the paper argues such interposers are becoming commercially viable, but adopting Morphlux means building this fabric, not reconfiguring existing electrical wiring.
Spare chips and extra fibers add cost. In-place fault tolerance needs healthy or spare chips reachable in the rack, and new optical connections to spares must run over distinct fibers to preserve signal integrity, so the design adds spare servers and fiber; the paper places spares as extra servers rather than reserving torus chips to preserve topology, but this is real overhead.
The prototype runs below production link speed. The end-to-end hardware prototype operates at a modest link rate (on the order of 10 Gbps), so the demonstrated absolute bandwidths are not production numbers; the paper argues the benefits are orthogonal to link speed and would grow with faster interconnects, but that projection is an argument, not a production measurement.
The reported gains are for specific settings and baselines. The up to 66 percent bandwidth improvement, up to 70 percent fragmentation reduction, 1.72 times throughput gain, and 1.2-second recovery are measured on the prototype and in simulation against particular torus baselines and tenant distributions; other workloads, slice-size mixes, and scales would shift them.
It targets torus-based multi-tenant ML fabrics. Morphlux is designed for the direct-connect torus datacenters used for large ML training; datacenters with different topologies or non-ML workloads are outside its stated scope, and how the approach generalizes is not the paper’s focus.

The evaluation

Serving multi-tenant ML on a torus fabric

Property	Static electrical torus	Rack-level optical switching	Morphlux
Reconfigurable inside the server
Small-slice bandwidth
Handles fragmentation
Failure blast radius
Reported outcome

A qualitative comparison of torus fabrics for multi-tenant ML. On its hardware prototype and in simulation, Morphlux improves tenant bandwidth by up to 66 percent, reduces fragmentation by up to 70 percent, raises training throughput by 1.72 times, and replaces a failed accelerator in 1.2 seconds.Underlined values explain themselves when clicked.

Where this stops working

What to keep in mind

This explainer is based on the paper’s full text (arXiv:2508.03674, titled “Morphlux: Transforming Torus Fabrics for Efficient Multi-tenant ML”; the ASPLOS 2026 version is titled “Reconfigurable Torus Fabrics for Multi-tenant ML”). The mechanism described is the paper’s: Morphlux is a server-scale programmable photonic fabric that connects accelerators on a wafer-scale optical interposer with reprogrammable silicon photonic links, and a software orchestrator (a resource allocator, a fragmented slice allocator, in-place fault tolerance, and a hardware control plane) redirects egress bandwidth, assembles contiguous logical slices from scattered chips, and optically replaces failed chips. The headline figures are the paper’s own: augmenting state-of-the-art torus-based ML datacenters with Morphlux improves tenant bandwidth by up to 66 percent, reduces compute fragmentation by up to 70 percent, and (on the hardware prototype) translates to a 1.72 times improvement in throughput, with failed-accelerator replacement in 1.2 seconds. The paper notes the prototype runs at a modest link speed and argues its benefits are orthogonal to link speed; the ASPLOS abstract phrases the throughput gain as finetuning throughput while the arXiv version says training throughput. Exact allocator algorithms, the interposer design, and the full evaluation should be read from the paper; code and data are at github.com/morphlux/morphlux.

Background

Why datacenters are making the network programmable

It helps to see Morphlux as part of a broad move to make the datacenter network as flexible as the compute it connects. For years the network was the fixed part of the system — cables and switches laid down once — while workloads grew ever more dynamic, and that mismatch became a source of waste: bandwidth stranded where it was not needed, resources fragmented by rigid boundaries, and failures that rippled because the topology could not adapt. The response across the field has been to make the fabric itself programmable and, increasingly, optical, because light offers reconfigurable, high-bandwidth connectivity that electrical wiring cannot match at scale. This lets operators reshape the network to fit the moment: dedicate bandwidth where a job needs it, pool and reconnect resources that would otherwise be stranded, and route around faults. The same drive to build specialized, reconfigurable fabrics that let the datacenter treat its interconnect as a fluid resource is the concern the work on an ultra-low-latency Ethernet fabric for memory disaggregation covered elsewhere on this site shares, engineering the network so distant resources can be composed on demand. Morphlux carries that philosophy into the ML training cluster, using server-scale programmable optics to make the torus adapt to its tenants instead of forcing its tenants to fit the torus.

If you remember only three things

1. Large ML clusters wire accelerators in a static torus for fast, switch-free collective communication, but sharing that fixed fabric among tenants causes three problems: a slice smaller than a full rack wastes much of each chip's egress bandwidth (links point outside the slice and cannot be rerouted), allocations fragment the torus so scattered free chips cannot form the contiguous slices tenants need, and a single chip failure has a large blast radius, disrupting a whole slice. Rack-level optical switching cannot reach inside the server to fix these.
2. Morphlux makes the interconnect inside the server programmable by mounting accelerators on a wafer-scale optical interposer with reprogrammable silicon photonic links, so software can redirect an accelerator's bandwidth. A software orchestrator then resolves all three problems: a resource allocator redirects idle egress bandwidth into a slice (ending under-utilization), a fragmented slice allocator wires physically scattered chips into a contiguous logical topology (cutting fragmentation), and in-place fault tolerance optically swaps a healthy or spare chip for a failed one within the rack (shrinking the blast radius). A hardware control plane programs the physical optical circuits.
3. On a hardware prototype and in simulation, Morphlux improves tenant bandwidth by up to 66 percent, reduces compute fragmentation by up to 70 percent, raises ML training throughput by 1.72 times, and replaces a failed accelerator in 1.2 seconds. It requires new photonic hardware and spare chips plus fiber, the prototype runs below production link speed (benefits argued to be orthogonal to link speed), and it targets torus-based multi-tenant ML fabrics.

Check yourself

Check your understanding

1. Why does a static torus fabric become inefficient in a multi-tenant ML datacenter?
2. What is Morphlux's core idea?
3. How does Morphlux reduce compute fragmentation and limit the blast radius of failures?
4. What did Morphlux achieve, and what are its main caveats?

Sources

The paper is “Reconfigurable Torus Fabrics for Multi-tenant ML” by Abhishek Vijaya Kumar, Eric Ding, Arjun Devraj, Darius Bunandar, and Rachee Singh (Cornell University and collaborators), published at ASPLOS 2026 (Volume 2), DOI 10.1145/3779212.3790238. The system is named Morphlux. It is licensed CC BY.

This explainer is written from the paper’s full text (arXiv:2508.03674, “Morphlux: Transforming Torus Fabrics for Efficient Multi-tenant ML”). The paper develops Morphlux, a server-scale programmable photonic fabric to interconnect accelerators within servers: accelerators are mounted on a wafer-scale optical interposer with reprogrammable silicon photonic links, and a software orchestrator — comprising a resource allocator, a fragmented slice allocator, in-place fault tolerance, and a hardware control plane — redirects egress bandwidth to eliminate under-utilization, assembles contiguous logical slices from physically scattered chips to reduce fragmentation, and optically replaces failed accelerators in place to limit the blast radius of failures. The reported results are the paper’s own: augmenting state-of-the-art torus-based ML datacenters with Morphlux improves the bandwidth of tenant compute allocations by up to 66 percent, reduces compute fragmentation by up to 70 percent, minimizes the blast radius of accelerator failures, and (on an end-to-end hardware prototype) translates to a 1.72 times improvement in throughput, replacing a failed accelerator chip with a healthy one in 1.2 seconds. The paper notes the prototype operates at a modest link speed and argues its system-level benefits are orthogonal to raw link speed; the ASPLOS abstract phrases the throughput improvement as finetuning throughput, while the arXiv version says training throughput. No numbers beyond the paper’s own have been introduced; exact allocator algorithms, the interposer and control-plane design, and the full evaluation should be confirmed in the paper, and code and data are available at github.com/morphlux/morphlux.