QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Architectures

Keyi Yin, Hezi Zhang, Xiang Fang, Yunong Shi, Travis S. Humble, Ang Li and 1 other

Quantum error-correcting codes need each check qubit to touch four or more neighbors, but real quantum chips are sparsely wired with only two or three connections, and the usual fix of swapping qubits around ruins the fixed layout error correction depends on; this work from UC San Diego and partners builds QECC-Synth, the first automated compiler that bridges distant qubits with shared helper qubits instead of moving them, treating the huge unexplored space of bridge shapes and gate schedules as a constraint problem a SAT solver optimizes — cutting extra two-qubit gates by up to three quarters and circuit depth by up to half, and working on codes and defective chips that prior tools simply cannot handle.

The argument in one glance

Problem

Error-correction codes need dense wiring that real chips do not have

Quantum error correction works by running many tiny check circuits over and over. Each one entangles a single syndrome qubit with several data qubits, so that an error on a data qubit flips the syndrome qubit's measurement and reveals itself. The catch is connectivity: a popular code like the surface code needs each syndrome qubit to talk directly to four data qubits, but real quantum chips are sparsely wired, with each qubit connected to only two or three neighbors. That mismatch between what the code wants and what the hardware offers is the central obstacle, and it is expected to persist as both codes and machines evolve.
What people did

Shuffle qubits together with SWAP gates, as ordinary compilers do

The mature toolbox for limited connectivity is qubit mapping and routing: when two qubits that must interact are far apart, insert SWAP gates to shuffle them next to each other. Decades of compiler work, from heuristic routers like Sabre to solver-based ones like SATmap, do exactly this for general quantum circuits, and it is the obvious thing to reach for.
Why it fell short

Swapping breaks the fixed layout error correction relies on

Moving qubits around is exactly wrong for error correction. The whole scheme repeats the same check circuits every cycle, so the data qubits must stay in fixed positions — and swapping relocates them. Forcing the positions to stay put can take exponentially many attempts, each SWAP costs three error-prone two-qubit gates, and because swapping treats data and helper qubits alike, it can simply run out of physical qubits and find no valid layout at all.
This paper's idea

Bridge distant qubits with shared helpers, and let a solver design it

Instead of moving qubits, connect them. QECC-Synth extends each syndrome qubit into an ancilla bridge, a short chain of helper qubits prepared in an entangled state, so a distant data qubit can reach the syndrome through the bridge while every qubit stays put. Prior bridging work built such bridges by hand for one code on one chip; QECC-Synth is the first to see the vast design space they open — the bridges' shapes, sizes, sharing, and gate schedules — and to search it automatically by casting the whole layout as a constraint problem a SAT solver optimizes.

Why this problem is worth solving

The workhorse being laid out here is a small circuit that runs an astonishing number of times.

Error syndrome measurement is how a quantum computer checks itself for errors without destroying the data it is protecting. For each of a code’s stabilizers — a group of data qubits that should collectively satisfy a parity rule — the machine runs a small circuit: it prepares one extra syndrome qubit, entangles it with those data qubits through controlled gates, and measures it. If no error has struck, the measurement comes out zero; if certain errors have, they propagate through the gates and flip the syndrome qubit to one, announcing that something went wrong without ever revealing the actual data. A single logical qubit is protected by hundreds of these little circuits — a distance-25 surface code needs over six hundred of them — and the whole battery is run again and again, every correction cycle, for the entire lifetime of the computation. Because they run so relentlessly and so often, how efficiently these circuits can be laid out on the hardware directly decides whether error correction is practical at all.

The device this paper introduces to close the connectivity gap is worth understanding on its own.

An ancilla bridge is a chain of extra helper qubits, called ancillas, inserted to connect two qubits that the hardware does not wire together directly. The trick is that the bridge qubits are prepared in a shared entangled state, so a control signal that logically belongs on one end can be applied at any qubit along the chain and still take effect correctly. For error correction this is powerful: instead of a single syndrome qubit needing to touch all four of its data qubits at once, the demand is spread out across a little bridge of ancillas, each of which needs only a couple of connections. Crucially, the data qubits never move, which is exactly what repeated error-correction cycles require, and a bridge costs fewer of the error-prone two-qubit gates than the equivalent chain of swaps. The one price is the extra gates used to build the bridge itself, so smaller bridges are better — every added gate is another chance for an error to creep in.

What people did before, and where it broke

Heuristic swapping routers (Sabre). Insert SWAP gates by a fast heuristic to route far-apart qubits together, the standard approach for compiling general quantum circuits onto limited hardware. Where it broke. It moves data qubits, which repeated error correction cannot tolerate, spends three two-qubit gates per swap, and cannot share helper qubits, so it inflates gate counts and error.
Solver-based swapping (SATmap). Encode the routing problem as Boolean constraints and let a SAT solver find an optimal insertion of swaps. Where it broke. It carries all the flaws of swapping, and because it reasons about every individual gate, its encodings balloon and it times out on complex codes or large connectivity gaps.
Manual bridging for one code (Steane-style designs). Hand-build an ancilla bridge for a particular code on a particular lattice, exploiting that bridges keep qubits fixed and use fewer gates. Where it broke. Each design is bespoke — one code, one architecture, small scale — with no path to newer codes or to chips with defective qubits.
Heuristic bridging for surface codes (Surf-Stitch). Adapt the surface code to regular lattices up to modest distance with a heuristic that stitches bridges together. Where it broke. It works only for the surface code on regular architectures, so a single fabrication-defective qubit breaks it, and being heuristic it offers no optimality and no reach to other codes.
The gap. Swapping fights error correction’s need for fixed positions and cannot share ancillas; the bridging idea respects both but existed only as hand-tuned, single-code, single-chip designs. Nobody had a general, automated way to exploit the real freedom bridges offer — their shapes, sizes, sharing, and schedules — across the diversity of codes and sparse, imperfect hardware that fault tolerance will actually run on.

How QECC-Synth works

From a code and a sparse chip to an optimized, scheduled layout

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The idea

See the design freedom in ancilla bridges that everyone else walked past. The pivotal observation is not a new device but a new appreciation of an old one. Because a bridge works by spreading an entangled state across helper qubits, an error still reaches the syndrome no matter which bridge qubit a data qubit attaches to — which means the bridge’s shape, its length, whether two stabilizers share part of it, and the order in which the gates fire are all free to vary while the circuit stays correct. Prior work fixed all of these by hand and thereby threw away the very flexibility that makes bridging powerful. QECC-Synth catalogs those freedoms explicitly and treats them as knobs to optimize. Finding that a whole dimension of the problem had been left unexplored, and that opening it reveals far better solutions than the field’s fixed designs, is the same discovery the transformer-training work covered elsewhere on this site makes, where adding a previously ignored axis to how a computation is distributed unlocks layouts no one in the old, narrower space could reach.

Turn the layout into a constraint problem and let a solver find the best packing. Once the freedoms are named, the question of where to put every data qubit, how to shape each bridge, and which ancillas to share becomes a giant combinatorial puzzle with hard rules (a bridge must actually connect, a qubit sits in one place) and a quality score (fewer gates, more parallelism). QECC-Synth writes all of it as Boolean constraints and hands it to a MaxSAT solver, which searches the space far more thoroughly than any hand-tuning could, then a second SAT stage packs the gates into the fewest time steps. Casting a hard spatial-layout problem as constraints and letting a solver pack the pieces optimally is the same strategy the on-chip-memory-allocation work covered elsewhere on this site takes, encoding an NP-hard placement puzzle for a solver rather than trusting a hand-written heuristic to lay everything out well.

When the whole problem is too big, cut it into solvable pieces. A MaxSAT encoding of an entire large code overwhelms even a good solver, so QECC-Synth does not insist on solving it in one shot. It partitions the stabilizers into subsets small enough to solve optimally, dispatches each to the two-stage solver, and then stitches the optimized fragments back into a full implementation, accepting a few swaps between fragments as the cost of scaling. Breaking an intractable global optimization into local sub-problems that a solver can actually finish, then recombining their answers into a whole, is the same divide-and-conquer discipline the scalable hardware-invariant-learning work covered elsewhere on this site relies on, decomposing a check that could never be run at full size into pieces that compose back into the complete result.

Following the reasoning through QECC-Synth

Fitting a degree-four code onto a degree-three chip

Following one surface-code check circuit shows why swapping fails, how a bridge fits, and what the solver then optimizes.

Step 1 of 5

The check circuit needs four neighbors; the chip offers three

A surface-code syndrome qubit must interact with four surrounding data qubits, so it needs a hardware node of degree four. But the target chip wires each qubit to only three others. The circuit, as written, simply does not fit the connectivity of the machine.

This degree-four-versus-degree-three mismatch is the concrete face of the code-topology-versus-hardware gap.

Why it works

Bridging connects distant qubits instead of relocating them. A swap physically moves a data qubit, which breaks the fixed positions every repeated correction cycle depends on → but an ancilla bridge reaches across the gap while every data qubit stays exactly where it was → so the layout survives cycle after cycle, and it does so with two gates per link instead of a swap’s three.
The bridge design space that others ignored contains the better answers. Hand-built methods fix one bridge shape for one code → but the shape, size, sharing, and schedule of a bridge can all vary while still extracting the syndrome correctly → so searching that whole space finds layouts a single fixed design could never reach, across many codes and chips at once.
Sharing ancillas lets one bridge serve several stabilizers at once. Swapping treats data and helper qubits alike, so each needs its own physical qubit and a small chip can simply run out → but neighboring stabilizers can share the middle of a bridge → so a code that has no valid swap-based layout still fits, which is why the baselines report no solution where QECC-Synth finds one.
Mapping each stabilizer as a whole shrinks the problem the solver sees. Routing every individual gate, as general compilers do, explodes the constraint encoding → but treating a stabilizer’s entire check circuit as one unit prunes the space dramatically → so the encoding carries up to a hundred times fewer clauses, and the solver finishes on codes where the swapping baselines time out.
Optimizing for two-qubit gates targets the error that actually dominates. Depth and gate count both hurt fidelity, so it is not obvious which to chase → but simulation shows the two-qubit-gate error threshold is far tighter than the idle-error threshold → so QECC-Synth spends its first stage minimizing added two-qubit gates and a second on depth, cutting logical error most where it counts.

What it costs (trade-offs and scope)

Every result is simulation, not hardware. The gate counts, depths, logical error rates, and thresholds all come from the Stim simulator and a matching decoder under a specific circuit-level error model. Nothing here ran on a real quantum device, so the practical fidelity gains are projected, not measured on silicon.
The optimal solver does not scale, and the fallback reintroduces swaps. The two-stage MaxSAT and SAT approach hits the 7,200-second time limit on large, dense codes. Big instances fall back to a partitioning heuristic that solves subsets optimally but then inserts SWAP gates between them — the very move the method criticizes — and gives up the global optimality guarantee.
The largest gains are over general-purpose swapping baselines. Sabre and SATmap are built for arbitrary circuits, not error-syndrome circuits, so the up-to-74.9-percent gate reductions against them are partly a mismatch of tools. Against the fair bridging baseline, Surf-Stitch, the margins are narrower.
On surface codes, the gate edge over the specialized tool is marginal. Surf-Stitch’s hand-built surface-code mapping is already near-optimal on perfect chips, so QECC-Synth’s real advantages there are depth (about 38.5 percent shallower) and generality, not the number of extra gates.
Sometimes the win is only that a solution exists at all. On several code-and-chip pairings the baselines return no result, timing out or running short of qubits. QECC-Synth’s edge there is feasibility, which genuinely matters, but it is not a like-for-like efficiency comparison.
It optimizes proxy metrics, not fidelity directly. Extra two-qubit gates and circuit depth are stand-ins for logical error; the ablation supports weighting gates first, but the objective is still a hand-weighted proxy, and the weights are set by the designer rather than derived from the true error rate.
Physical-qubit budgets still bind. Ancilla sharing economizes, but a dense enough code on a small or sparse enough chip can remain infeasible. QECC-Synth makes many more layouts possible; it does not make every code fit every machine.

The evaluation

Ways to fit error-correction circuits onto sparse quantum chips

Property	Sabre (heuristic swap)	SATmap (solver swap)
Approach
Keeps data qubits fixed
Codes and chips covered
Handles defective qubits	No	No
Efficiency relative to QECC-Synth	74.9 percent more gates, 34.7 percent deeper	26.5 percent more gates, 55.5 percent deeper

Fitting error-syndrome circuits onto sparse architectures, all evaluated in simulation with a circuit-level error model. Against swapping routers QECC-Synth cuts extra two-qubit gates by up to 74.9 percent and depth by up to 55.5 percent; against the surface-code-specific Surf-Stitch it uses 10 percent fewer gates and 38.5 percent less depth, gives a distance-seven code a 6.8-to-8.6-times lower logical error at equal gate count, and finds solutions on codes and defective chips where the baselines time out or report none.Underlined values explain themselves when clicked.

Where this stops working

What to keep in mind

QECC-Synth is a genuinely useful contribution: it recognizes that ancilla bridges have a large, unexplored design space, casts the layout and scheduling of error-syndrome circuits as a two-stage constraint problem, and is the first automated compiler to handle diverse codes and even defective chips with fewer error-prone gates and shallower circuits than prior tools. Read the numbers with their scope. Everything is measured in simulation under a chosen error model, not on real hardware, so the fidelity gains are projected. The optimal solver times out on large dense codes, and the partitioning fallback that rescues scalability reinserts the very swaps the method sets out to avoid, dropping optimality. The biggest reductions are against general swapping routers not designed for this task; against the specialized surface-code tool the gate edge is marginal and the real wins are depth and generality, including cases where the advantage is simply that a solution exists. And it optimizes hand-weighted proxies — gate count and depth — rather than the logical error rate itself. The durable idea is the reframing: bridges are a rich design space, and a solver can search it across the codes and imperfect chips that fault tolerance will actually run on.

Background

Why error correction is the price of quantum computing

It is worth stepping back to see why so much machinery exists just to check a quantum computer for errors. Qubits are extraordinarily fragile — they decohere, they are jostled by their environment, and every gate applied to them is slightly wrong — so a raw quantum computation of any real length is drowned in noise long before it finishes. The only known path to useful, large-scale quantum computing is to accept that the physical qubits are unreliable and to build correction around them: spread each logical qubit across many physical ones, and run these syndrome circuits constantly to catch and undo errors faster than they accumulate. That makes the efficiency of error correction not a side concern but the dominant cost of the whole enterprise, since the correction circuitry runs vastly more often than the computation it protects. The same posture of refusing to trust the hardware and instead wrapping it in continuous checking drives the silent-data-corruption work covered elsewhere on this site, which assumes classical chips can quietly miscompute and embeds tests to catch it rather than presuming the hardware is sound. The broader pattern is that as we push computing to physical limits, correctness stops being something the device provides for free and becomes something the system must actively and relentlessly enforce.

If you remember only three things

1. Quantum error correction runs tiny check circuits constantly, each entangling a syndrome qubit with several data qubits, but the codes need dense connectivity (a syndrome qubit touching four data qubits) while real chips wire each qubit to only two or three — and the usual fix of inserting SWAP gates is wrong here because it moves data qubits whose positions must stay fixed across every repeated cycle and piles on error-prone two-qubit gates.
2. QECC-Synth instead uses ancilla bridges — short chains of entangled helper qubits that let a distant data qubit reach the syndrome while nothing moves — and is the first to exploit their full design freedom (bridge shape, size, ancilla sharing, gate scheduling) by casting the layout as a two-stage constraint problem: a MaxSAT stage places qubits and bridges to minimize extra gates and maximize parallelism, a SAT stage schedules for minimal depth, and a partitioning heuristic keeps it tractable at scale.
3. In simulation across surface, color, Steane, and qLDPC codes on sparse and defective chips, it cuts extra two-qubit gates by up to 74.9 percent and depth by up to 55.5 percent versus swapping routers, beats the surface-code-specific Surf-Stitch by 38.5 percent in depth with a 6.8-to-8.6-times lower logical error at equal gate count, and finds solutions where baselines fail — but all results are simulated, the optimal solver times out on large codes so the fallback reinserts swaps, the gate edge over the specialized tool is marginal, and it optimizes hand-weighted proxies rather than logical error directly.

Check yourself

Check your understanding

1. Why is the usual SWAP-based routing wrong for error-syndrome circuits?
2. What is QECC-Synth's central idea?
3. Why does QECC-Synth prioritize minimizing extra two-qubit gates over minimizing circuit depth?
4. Which statement best reflects the limits of QECC-Synth's results?

Sources

The paper is “QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Hardware Architectures” by Keyi Yin, Hezi Zhang, Xiang Fang, Yunong Shi, Travis S. Humble, Ang Li, and Yufei Ding, published at ASPLOS 2025, pages 876 to 890, DOI 10.1145/3669940.3707236. The authors are at the University of California, San Diego, AWS Quantum Technologies, Oak Ridge National Laboratory, and Pacific Northwest National Laboratory.

This explainer is written from the full 15-page text. Everything above comes from the paper’s own sections: the introduction and background on error-syndrome-measurement circuits for stabilizer codes, the mismatch between codes that demand degree-four connectivity and hardware with degree two or three, the swapping-based methods (Sabre, SATmap) and their unsuitability for the fixed-position requirement of repeated correction, and the bridging method that spreads connectivity across an entangled ancilla bridge at the cost of extra two-qubit gates; the motivating examples cataloging the flexibilities of code-topology mapping (bridge shape and size, ancilla sharing) and circuit scheduling (stabilizer commutativity, equivalent bridge-state preparation, correct parallelism); the two-stage constraint-based synthesis — a MaxSAT code-topology mapping minimizing total ancilla size and maximizing compatible pairs, and an iterative SAT gate-scheduling stage minimizing depth — plus the code-partitioning heuristic for scale; and the evaluation using the NuWLS-c and PySAT solvers with the Stim simulator and a MWPM decoder across surface, color, Steane, and HyperGraph-Product qLDPC codes on square, hexagon, heavy-square, and heavy-hexagon architectures, reporting average reductions of 74.9 and 26.5 percent in extra two-qubit gates and 34.7 and 55.5 percent in depth against Sabre and SATmap, 10 percent fewer gates and 38.5 percent less depth against Surf-Stitch with a 6.8-to-8.6-times lower logical error at equal gate count and an error threshold improvement from 0.53 to 0.60 percent, the not-exist and time-limit outcomes of the baselines on hard instances, the ablation showing a 1.2 percent two-qubit-gate threshold versus a 5 percent idle threshold, and the encoding-size comparison showing QECC-Synth uses far fewer variables and clauses than SATmap.