Design of Novel Analog Compute Paradigms with Ark

Analog circuits can compute in strange, efficient ways — a network of transmission lines, a grid of coupled oscillators, a mesh of nonlinear cells — but designing one for a specific job is hard because the usual analog design tools only know about conventional parts like filters, and because real devices are never ideal; this paper (Stanford and collaborators) builds Ark, a programming language for describing these unconventional analog computations, which compiles a design into the differential equations that simulate it, checks the design is well-formed, and lets a designer progressively fold in real-world imperfections to see how they change the result.

The argument in one glance

Problem

Designing a specialized circuit for an unconventional analog computation has no good method

Analog circuits can compute in ways that look nothing like digital logic: a network of transmission lines that route, delay, and reflect signals; a grid of coupled oscillators whose phases settle into an answer; a mesh of nonlinear cells that relaxes to a processed image. These unconventional analog compute paradigms can be remarkably efficient, especially near a sensor or in memory. But there is an untapped middle of the design space — a circuit that is specialized to one application and uses one of these paradigms. Designing for it is hard on three fronts: the standard co-design methods and figures of merit were built for conventional parts like filters and analog-to-digital converters, not these; there is little accumulated design intuition for the unconventional circuits; and, worst of all, a designer must reason about how the countless imperfections of real devices distort a computation that is defined by continuous physical dynamics, not clean bits.
What people did

Pick one of the two extremes the field already knows how to build

Prior work sits at two poles. One builds highly specialized classical analog circuits — filters, converters — engineered through careful co-design to be resource-efficient, but barely programmable. The other builds highly reconfigurable analog accelerators that faithfully implement a whole unconventional paradigm, trading a lot of area and power for that generality.
Why it fell short

Neither pole fits a specialized circuit for an unconventional paradigm

The classical-circuit tools cannot even describe the relevant behaviors of an unconventional computation, because their specifications assume conventional circuit classes. The reconfigurable accelerators can express the computation, but their generality makes them resource-hungry and inefficient, defeating the point of specializing. And nothing helps a domain specialist and an analog designer, who speak different languages, jointly navigate the design of a specialized unconventional circuit or understand how its non-idealities reshape the computed result.
This paper's idea

A language for analog compute paradigms that compiles to their differential equations

Ark is a programming language for describing unconventional analog computations. Each analog compute paradigm is expressed as a small domain-specific language whose building blocks map to a dynamical graph — a typed graph whose nodes are state variables and whose edges are terms in a system of differential equations. Ark validates that a design is well-formed and compiles it to those equations to simulate its transient behavior, and, crucially, it lets an analog designer extend the paradigm with new constructs so a domain specialist can progressively fold real device non-idealities into an ideal computation and watch how the result changes.

Why this problem is worth solving

The reason ordinary hardware description does not help here is that these circuits do not compute with logic values at all.

An analog compute paradigm is a way of computing directly with the continuous physical behavior of a circuit rather than with discrete bits. Instead of gates flipping ones and zeros, a quantity such as a voltage, a current, or an oscillator phase evolves in time according to physics, and the answer is read off from where that evolution settles or from the shape of a transient. Transmission-line computing uses how signals delay and reflect along wires; oscillator-based computing uses how a network of coupled oscillators locks into phase patterns; cellular-nonlinear computing uses a grid of interacting nonlinear cells that relaxes toward a processed output. What unifies them is that each is naturally described by a system of differential equations governing how its signals change over time. That is exactly why conventional digital and even classical-analog design tools, which speak in logic functions or in figures of merit for filters, cannot capture what these circuits are doing.

Because the computation lives in physics, the imperfections of physics are part of the computation.

A circuit non-ideality is any way a real analog device departs from its idealized model. Manufacturing leaves every transistor and capacitor slightly different from its neighbor, so a parameter meant to be identical across a circuit actually varies from instance to instance — device mismatch. Amplifiers that should saturate cleanly instead round off near their limits; components drift with temperature; signals attenuate. In digital logic these effects are largely hidden beneath comfortable noise margins, but in analog computing there is no such margin: the non-idealities directly perturb the continuous dynamics, so they can slow a computation, corrupt its answer, or — sometimes — even help it. This is why a designer of an unconventional analog circuit cannot reason about the ideal behavior alone; they must be able to introduce specific non-idealities into the model and see how each one reshapes the result, which is precisely the capability Ark is built to provide.

What people did before, and where it broke

Highly specialized classical analog circuits. Design filters and converters through careful co-design so they are compact and efficient, accepting that they are barely programmable. Where it broke. Their design methods and figures of merit are specialized to conventional circuit classes, so they cannot even specify the functional behavior of an unconventional computation like transmission-line or oscillator-based computing.
Highly reconfigurable analog accelerators. Build a flexible platform that faithfully implements an entire unconventional paradigm, programmable enough to run any computation expressible in it. Where it broke. That generality costs substantial area and power, hurting scalability and efficiency; it is the opposite of specializing a circuit to one application, so it leaves the efficiency of the untapped middle on the table.
General analog simulators (SPICE-level modeling). Model a proposed circuit at the device level and simulate it to see what it does. Where it broke. A device-level netlist describes one concrete circuit, not the paradigm or its design space; it offers no way to express a computation abstractly, to check it is a valid instance of the paradigm, or to systematically explore which non-idealities matter — you simulate points, not the space.
Hand analysis and intuition. Rely on the designer to reason about the differential equations and the effect of non-idealities directly. Where it broke. There is little accumulated intuition for these unconventional circuits compared to filters and converters, and coordinating a domain specialist (who knows the workload) with an analog designer (who knows the devices) has no shared, checkable language, so navigating the space by hand is slow and error-prone.
The gap. No approach let a team describe an unconventional analog computation abstractly, verify it is a well-formed instance of its paradigm, compile it to the differential equations that simulate its real dynamics, and then progressively introduce device non-idealities to study their impact — all within one language shared by the domain specialist and the analog designer.

How Ark is put together

From a paradigm DSL to validated differential equations, then to non-idealities

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The idea

Make each analog compute paradigm a small language, and let the analog designer grow it. The core reason the two extremes fail is that neither gives a shared, extensible vocabulary for a specialized unconventional circuit. Ark makes each paradigm a domain-specific language: the analog designer declares the node and edge types of the paradigm, the production rules that give them dynamics, and the validation rules that say what counts as a legal design. A domain specialist then writes computations in that language, and when they need to explore a real hardware constraint, the analog designer extends the language with new constructs that codify a design point or a non-ideality. The language is not fixed; it grows to codify the design space as the collaboration proceeds. Treating a hardware design domain as a language you deliberately grow with new user-defined constructs, rather than a fixed tool, is the same philosophy the scheduling-language work covered elsewhere on this site is built on, where the language is designed to be extended with new externally-defined operations rather than frozen at release.

Compile the abstract description down to the differential equations that are its ground truth. A paradigm DSL would be merely notation if it did not connect to real behavior, so Ark gives every construct a precise meaning in a single intermediate representation, the dynamical graph, whose nodes are the state variables of a dynamical system and whose edges carry the terms coupling them. From a computation expressed as such a graph, Ark’s compiler mechanically derives the system of differential equations that governs the circuit’s transient dynamics and simulates them, turning a high-level design into concrete signal trajectories. Because the semantics bottom out in the equations physics actually obeys, a design can be simulated and, as the paper shows, checked against device-level SPICE simulation. Giving a domain-specific language a rigorous lowering into a precise executable model, so that a high-level description is compiled straight into the exact mathematics of its behavior, is the same discipline the domain-specific symbolic-compilation work covered elsewhere on this site relies on, compiling a specialized description into a formal model a solver or simulator can reason about directly.

Add imperfection on purpose, one non-ideality at a time, through inheritance. The distinctive move is that Ark treats non-idealities as first-class, incrementally added behaviors rather than an afterthought. A derived language inherits the node types, edge types, production rules, and validation rules of its parent, and can introduce mismatched attributes — values sampled from a normal distribution at simulation time, with a seed for reproducibility — and override rules to capture non-ideal dynamics like the imperfect saturation of a transistor pair. Strict inheritance guarantees that a computation written for the ideal paradigm still simulates in the derived language, so the specialist can selectively replace ideal nodes with non-ideal ones and watch exactly which imperfection changes the answer and by how much. Progressively refining an idealized model to incorporate the physical randomness and non-idealities of the real hardware, so a designer can measure their effect instead of guessing, is the same randomness-aware stance the photonic-quantum compiler work covered elsewhere on this site takes, folding the hardware’s inherent non-ideal behavior into the model rather than pretending the device is perfect.

Following a transmission-line PUF through Ark

Designing and stress-testing an analog security primitive

A walk through the paper's transmission-line PUF case study: describing the computation, validating it, simulating it, and progressively adding device mismatch to explore the design space.

Step 1 of 5

Choose the paradigm and write the ideal computation

The team targets a physical unclonable function — a security primitive whose response depends on tiny fabrication variations. They pick the transmission-line-network paradigm and write, in its Ark DSL, a branched transmission line as a dynamical graph of alternating voltage and current nodes with an input node injecting a pulse.

A function argument selects branched versus linear topology, so the same code expresses a family of designs; the paper simulates 53-node branched and linear lines.

Why it works

A per-paradigm DSL captures behaviors classical tools cannot. Conventional analog specifications assume filters and converters and cannot describe transmission-line or oscillator computing → but a language whose primitives are the paradigm’s own node and edge types speaks its behaviors natively → so an unconventional computation becomes something a designer can actually write down and check.
Lowering to a dynamical graph gives every construct exact meaning. A high-level description alone cannot be trusted to reflect real behavior → but mapping nodes to state variables and edges to differential-equation terms compiles the design straight into the equations physics obeys → so simulation reflects the true transient dynamics, matching SPICE within one percent in the case study.
Validation rejects designs that are not real instances of the paradigm. Nothing normally stops a graph from encoding physically meaningless dynamics → but local and global validation rules (such as requiring alternating voltage and current nodes) reject ill-formed designs before simulation → so the designer explores only legal points of the paradigm’s space.
Inheritance makes non-idealities additive and safe to explore. Bolting imperfections onto a model ad hoc risks breaking the base computation → but strict single inheritance lets a derived language add mismatch and non-ideal rules while guaranteeing the ideal computation still simulates → so a specialist can turn one non-ideality on at a time and attribute each change in the answer to it.
One shared language unites the specialist and the designer. A domain expert and an analog designer otherwise lack any common, checkable medium → but Ark lets the designer codify the design space as language extensions the specialist then uses → so the two co-design through the language, and design intuition accumulates as reusable constructs.

What it costs (trade-offs and scope)

Everything rests on the fidelity of the differential-equation model. Ark simulates the dynamical system it derives, so its conclusions are only as good as that model; the paper validates one case (the GmC transmission-line network) against SPICE within one percent error, but a paradigm or non-ideality whose real physics escapes the chosen equations would not be captured, and Ark does not itself model effects the language author does not encode.
The analog designer must still supply the physics. Ark is a framework for codifying paradigms and non-idealities, not a library of them; someone has to write each paradigm’s node and edge types, production rules, validation rules, and non-ideal extensions correctly. The quality of the design-space exploration depends on that human-authored language being faithful.
It informs design; it does not synthesize or optimize a circuit. Ark helps explore trade-offs and evaluate the impact of non-idealities, and it can emit SPICE netlists, but it does not automatically search for or produce an optimal specialized circuit; the designer still makes the design decisions, using Ark to simulate and compare candidates.
Evidence is three exemplary case studies, not a broad benchmark. The paper demonstrates Ark on a transmission-line PUF, a cellular-nonlinear-network edge detector, and oscillator-based computing, showing the approach generalizes across paradigms and yields actionable conclusions — but this is a demonstration of expressiveness and usefulness, not a large quantitative study of many designs or a comparison of end circuit efficiency against hand design.
Simulation cost and abstraction bound scale. The computations shown are modest in size (for example 53-node lines), and simulating systems of differential equations over sampled non-idealities has its own cost; the paper does not claim Ark scales to very large circuits or replaces detailed device-level analysis, but rather that it enables early-stage, paradigm-level modeling and exploration.

The evaluation

Three ways to approach an unconventional specialized analog circuit

Property	Classical analog co-design	Reconfigurable analog accelerator
Can it express an unconventional paradigm
Specialized and efficient for one application
Models device non-idealities
Verifies a design is well-formed		By construction of the platform
Grounded against device-level simulation	Yes for classical parts	Depends

A qualitative comparison from the paper, positioning Ark against the two established extremes of analog design. Ark targets the specialized-but-unconventional middle; the SPICE agreement (root-mean-squared error within one percent over 1000 generated mismatched transmission-line graphs) is the paper's empirical validation of the model.Underlined values explain themselves when clicked.

Where this stops working

What to keep in mind

The contribution is a language and methodology, and it should be read as one. Ark shows convincingly that an unconventional analog computation can be written as a domain-specific language, validated for well-formedness, compiled to the differential equations that simulate its real transient dynamics, and progressively enriched with device non-idealities through strict inheritance — and it grounds this by matching device-level SPICE within one percent error over a thousand generated mismatched transmission-line graphs, then draws real design conclusions across three paradigms (a transmission-line PUF, a cellular-nonlinear-network edge detector, and oscillator-based computing). What it does not do is synthesize or optimize a circuit for you: it is a framework for codifying paradigms and their non-idealities, so the physics must be authored correctly by an analog designer, and its conclusions are only as faithful as the equations that were written. The case studies demonstrate expressiveness and usefulness rather than a broad quantitative sweep or a head-to-head efficiency comparison with hand design, and the examples are modest in size. Within that scope, Ark is a clean answer to a real gap: a shared, checkable, extensible language that lets a domain specialist and an analog designer co-design specialized circuits for unconventional analog computing and reason early about how imperfect devices reshape the result.

Background

Why unconventional analog computing is having a moment

It helps to see why anyone reaches for these strange circuits rather than a digital chip. The pressures are physical: enormous data comes off sensors and out of memory, and moving all of it across the analog-to-digital boundary to a digital processor costs time and energy. Computing in the analog domain — in the sensor, near or in memory — can sidestep that data movement, and letting physics do the work directly can be extraordinarily efficient for the right problem, whether that is a transmission line encoding a hard-to-clone signature, a mesh of cells filtering an image, or a network of oscillators solving a relaxation problem. The catch is that this efficiency comes precisely from abandoning the clean digital abstraction, which is what makes these circuits so hard to design and to trust. That same tension — chasing efficiency by moving computation into an unconventional substrate and then needing new tools to program and reason about it — is the world the compiler for content-addressable in-memory accelerators covered elsewhere on this site inhabits, building a compilation path so an unconventional in-memory compute fabric can actually be targeted. Ark is a bet that the way to unlock the specialized, efficient middle of this space is to give it a real language, so that describing, validating, and stress-testing an analog computation becomes an engineering discipline rather than an act of intuition.

If you remember only three things

1. There is an untapped, efficient middle of the analog design space — circuits specialized to one application yet computing with an unconventional paradigm like transmission-line, oscillator-based, or cellular-nonlinear computing — that is hard to design because standard analog tools and figures of merit assume conventional classes like filters, there is little design intuition, and a designer must reason about how real device non-idealities perturb a computation defined by continuous dynamics.
2. Ark is a programming language that makes each analog compute paradigm a domain-specific language: designs are built as a dynamical graph (nodes are state variables, edges are differential-equation terms), a validator checks well-formedness with local and global rules, and a dynamical-system compiler derives and simulates the system of differential equations; strict single inheritance lets an analog designer extend a paradigm with new constructs so a domain specialist can progressively fold in device non-idealities (like mismatch and non-ideal saturation) and measure their effect.
3. Across three case studies — a transmission-line physical-unclonable-function, a cellular-nonlinear-network edge detector, and oscillator-based computing — Ark helped explore design trade-offs and yielded concrete conclusions (for example, favor transconductance mismatch over capacitance mismatch in the PUF, and prioritize reducing one mismatch parameter over another in the CNN, where a non-ideal saturation even helped convergence), and its model matched device-level SPICE within one percent error over 1000 generated mismatched graphs. It is a co-design language and methodology, not an automatic circuit synthesizer.

Check yourself

Check your understanding

1. What gap in the analog design space does Ark target?
2. What is the dynamical graph, and why is it central to Ark?
3. How does Ark let a designer study the effect of device non-idealities?
4. What did the case studies show, and what are Ark's limits?

Sources

The paper is “Design of Novel Analog Compute Paradigms with Ark” by Yu-Neng Wang (Stanford University), Glenn Cowan (Concordia University), Ulrich Ruehrmair (TU Berlin and University of Connecticut), and Sara Achour (Stanford University), published at ASPLOS 2024, DOI 10.1145/3620665.3640419.

This explainer is written from the full text of the authors’ arXiv version (arXiv:2309.08774). Everything above comes from the paper’s own sections: the introduction framing the analog design space and its two extremes (specialized classical circuits and reconfigurable unconventional accelerators) and the untapped specialized-but-unconventional middle Ark targets; the description of Ark as a language for analog compute paradigms with three capabilities (paradigms as DSLs, codifying analog design spaces via DSL extension, and progressive design through inheritance) and the domain-specialist and analog-designer co-design flow; the dynamical-graph intermediate representation (typed directed graph with nodes as state variables and edges as dynamics, with attributes mapping to device parameters), and the compiler and validator that derive and simulate the system of differential equations and enforce local and global validation rules; the transmission-line-network case study (the Telegrapher’s-equation model, the branched versus linear topologies, the alternating voltage/current validation rule, the invalid voltage-to-voltage connection, and the signal-echo trajectories used to encode a physical-unclonable-function response), the GmC-integrator implementation and the inherited GmC-TLN language that models capacitance and transconductance mismatch with the empirical result that 1000 valid mismatched graphs all map to SPICE netlists and match transient dynamics within one percent root-mean-squared error; and the two further case studies — the cellular-nonlinear-network edge detector with its hardware extension modeling bias mismatch, parameter mismatch, and non-ideal saturation (with the conclusions about prioritizing parameter mismatch and the beneficial non-ideal saturation), and oscillator-based computing with its coupled-oscillator phase dynamics.