Codesign of quantum error-correcting codes and modular chiplets in the presence of defects

Sophia Fuhui Lin, Joshua Viszlai, Kaitlin N. Smith, Gokul Subramanian Ravi, Charles Yuan, Frederic T. Chong and 1 other

A useful quantum computer needs more than a million high-quality qubits, but manufacturing is so imprecise that roughly 2 percent of the qubits on a chip today come out broken — and a broken qubit is far worse than a missing one, because errors occurring near it go UNDETECTED, which destroys the entire premise of quantum error correction that adding more qubits makes the machine exponentially more reliable; the tempting response is to demand flawless chips, which at these defect rates means throwing away almost everything you manufacture; this paper (Chicago, MIT and IBM) instead combines two ideas — build the machine from many small CHIPLETS so each one can be tested and only the good ones kept, and adapt the error-correcting code itself to work around whatever defects a chiplet turns out to have, by merging the broken checks into larger ones called SUPER-STABILIZERS — and then does the thing the field had not done, which is to simulate the result and measure what it actually costs; the payoff is that a defective patch keeps the same exponential error suppression as a perfect one of the same code distance, and the authors find two cheap metrics that predict a chiplet's quality better than the obvious method of counting its broken qubits, cutting the extra hardware cost from 336 times down to under 3 times at a 1 percent defect rate.

The argument in one glance

Problem

Broken qubits do not just reduce capacity — they break error correction itself

A useful quantum computer must encode each usable LOGICAL qubit in a large array of physical qubits that constantly check each other for errors, and estimates put the requirement at over a million high-quality physical qubits. But solid-state devices cannot be manufactured that precisely. The heart of a superconducting qubit is a junction whose features are only hundreds of nanometres across, smaller than the wavelengths of light used to pattern them, so small deviations are unavoidable — frequencies drift from their targets and collide with neighbours, and stray impurities appear in the materials. One estimate puts about 2 percent of the qubits on a current device in the broken category. The damage is worse than lost capacity. Error correction works by repeatedly measuring checks that reveal WHERE errors happened, and near a defect those checks cannot be performed, so errors there go undetected. That means adding more physical qubits stops making the logical qubit more reliable, and the exponential protection that justifies the entire enterprise disappears.
What people did

Manufacture chips until you get perfect ones

The straightforward response is to insist on defect-free hardware. Fabricate chips, test them, and use only those that come out flawless. This keeps the error-correcting code exactly as the theory describes it, with no adaptation needed, and it is essentially how classical chip manufacturing has always dealt with imperfect yield.
Why it fell short

At these defect rates, demanding perfection is unaffordable

The trouble is arithmetic. A logical qubit of the quality a real algorithm needs is built from hundreds or thousands of physical qubits, and the chance that a large block contains NO defect falls off sharply as the block grows. So the number of qubits you must fabricate for every one you can actually use explodes. The paper measures this directly — insisting on defect-free patches costs 18 times the ideal number of qubits at a 1 percent defect rate and 336 times at 2 percent, and for the higher-quality logical qubits a real algorithm needs, the same defect-intolerant approach costs over 56000 times the ideal at a 1 percent defect rate. The overhead grows exponentially as you demand better logical qubits. Meanwhile the theory community had shown that a code CAN in principle be adapted around defects, but nobody had built a general tool for arbitrary defect patterns, established a criterion for judging which imperfect chips are worth keeping, or measured what any of it actually costs.
This paper's idea

Build from small testable chiplets, adapt the code around the defects, and measure the cost

This paper (Chicago, MIT and IBM — Lin, Viszlai, Smith, Ravi, Yuan, Chong, Brown) combines two strategies and then does the measurement the field was missing. First, build the machine MODULARLY from many small chiplets, which allows each one to be tested and selected before it is integrated — something a single large chip cannot offer, because one bad region contaminates the whole device. Second, rather than discarding every imperfect chiplet, ADAPT the error-correcting code to whatever defects it has, by merging the checks that a defect has broken into larger combined checks called SUPER-STABILIZERS, and by reshaping the patch boundary when a defect sits too close to the edge. The authors build an automated tool that does this for an arbitrary defect pattern and simulates the result. Their central finding is that an adapted patch still suppresses logical failure exponentially, behaving like a defect-free patch of the same code distance and just costing more physical qubits. They then identify two cheaply computable metrics that predict a chiplet's quality BETTER than the obvious approach of counting its broken qubits, and use them to decide which chiplets to keep. With the chiplet size chosen well, the extra hardware cost falls to under 3 times the ideal at a 1 percent defect rate.

Why this problem is worth solving

The promise of quantum computing rests entirely on a mechanism that fabrication defects attack directly, so the mechanism has to be understood first.

QUANTUM ERROR CORRECTION solves the problem that physical qubits are far too fragile to compute with. The answer is to encode one reliable LOGICAL qubit across many unreliable physical ones. In the SURFACE CODE, the most practical such scheme, physical qubits sit on a two-dimensional grid where each one interacts only with its neighbours. Some are DATA qubits holding the encoded information; the rest are MEASUREMENT qubits, each responsible for repeatedly measuring a small check called a STABILIZER on the handful of data qubits around it. Measuring a stabilizer reveals whether an error occurred nearby WITHOUT revealing the encoded information, which would destroy it. Comparing each check against its previous reading produces a stream of detection events, and a decoding algorithm uses that stream to work out what error most likely happened and correct it. The essential quantity is the CODE DISTANCE, written d, which is the smallest number of physical errors that can combine to corrupt the logical qubit. Because a failure needs about d/2 errors to line up, the logical failure rate falls EXPONENTIALLY as d grows — spend more physical qubits, get a dramatically more reliable logical one. That exponential relationship is the entire reason fault-tolerant quantum computing is considered achievable

— and it is precisely what a fabrication defect threatens.

The threat is specific and worth stating carefully, because a broken qubit is not simply a missing one.

A FABRICATION DEFECT is a qubit or a connection between qubits that comes out of manufacturing with severely limited function. They are unavoidable in solid-state devices. A superconducting transmon qubit is built around a Josephson junction whose features measure only hundreds of nanometres, smaller than the wavelengths used in the lithography that patterns them, so small imprecisions in position, dimension or surrounding layers change how the qubit behaves. On fixed-frequency designs the dominant problem is FREQUENCY COLLISION, where manufacturing variation shifts a qubit away from its intended frequency until it overlaps a neighbour, and because the variation is random, every chip ends up with a unique frequency profile. Stray impurities in material layers add further defects. One estimate puts about 2 percent of the qubits on a current transmon device in this broken category. The reason this is worse than losing capacity is that error correction depends on MEASURING the checks around every region. Around a defect those checks cannot be measured, so errors happening there are never detected, and undetected errors accumulate. With a fixed density of defects and no adaptation, increasing the code distance stops reducing the logical failure rate — the exponential protection simply stops working

What people did before, and where it broke

Use only defect-free chips. The classical instinct — manufacture, test, discard the bad ones. It keeps the code exactly as theory describes, but the chance a large block is entirely defect-free collapses as the block grows, so the cost per usable logical qubit explodes at realistic defect rates.
Modular chiplets to chase a defect-free device. One prior work also proposes building from small quantum chiplets to cope with fabrication defects, which does help, because small units can be tested and selected individually. But it aims at assembling a defect-free machine and does not specialize to error correction, so it cannot make use of a chiplet that has defects.
Super-stabilizers in theory. A separate line of work showed that the code can be adapted around a defect by merging the broken checks into larger ones. Valuable, but earlier protocols targeted a less qubit-efficient variant of the surface code that needs roughly twice the physical qubits per logical qubit, and one such scheme left it unclear whether its measurement schedule even preserves the exponential protection.
The gap. Nobody had an automated way to adapt the efficient rotated surface code to an ARBITRARY pattern of defects, nobody had established a criterion for deciding which imperfect chiplets are worth keeping, and nobody had measured the resource cost of any of it. Theory said adaptation was possible; no one had shown it was worth doing, or how much it saves. That is the gap this paper fills.

How a defective chiplet is made usable

Adapt the code to the defects, score the chiplet, and keep it or discard it

Defects stop errors from being detected

Around a broken qubit or link the local checks cannot be measured, so errors there go unnoticed. With a fixed density of defects and no adaptation, increasing the code distance no longer reduces the logical failure rate, and the exponential protection that motivates the whole design disappears.
↓ →
Build the machine from small testable chiplets new

Rather than one large chip, fabricate many small ones, each holding a single logical qubit. Small units can be measured and judged individually before assembly, so bad ones are never integrated — an option a monolithic chip cannot offer, since there one bad region degrades the entire device.
↓ →
Merge the broken checks into super-stabilizers new

Where a defect has broken the local checks, combine them into a larger combined check that surrounds the defective region, so errors near it are detected again. The two halves of such a check cannot be measured at the same time because they interfere, so they are measured in alternating cycles, and around larger defect clusters each type is repeated several times before switching.
↓ →
Reshape the boundary when a defect sits near the edge new

A defect too close to the patch edge cannot be surrounded by a combined check at all. The tool instead deforms the boundary of the patch to exclude that region. The authors developed a new boundary-deformation algorithm because the qubit-efficient rotated surface code has more complicated boundaries than the variant earlier work handled.
↓ →
Score each chiplet with two cheap metrics new

Compute the adapted patch's code distance, and as a tie-breaker the number of distinct ways a failure can occur using that many errors, found with a graph search. Both are cheap to evaluate and together predict a chiplet's real fidelity better than the obvious approach of counting broken qubits.
↓ →
Choose the chiplet size that balances yield against waste new

Larger chiplets are more likely to pass the test but cost more qubits each; smaller ones are cheaper but fail more often. Since the true cost counts every qubit fabricated including those on rejected chiplets, there is an optimal size for each defect rate and quality target, and choosing it well is what keeps the overhead low.

The adaptation tool handles arbitrary defect distributions and emits a stabilizer measurement circuit for the Stim simulator; the code is publicly released. Results come from simulation under a circuit-based noise model with non-defective qubits at error rates around 0.1 percent.

The idea

Make the units small enough to throw away. The single structural decision behind everything else is modularity. On one large monolithic chip, a defect anywhere degrades the whole device, and you must either accept the damage or discard an enormous amount of working hardware. Break the machine into small chiplets, each carrying one logical qubit, and every unit can be tested and judged on its own before assembly — so a bad one costs you only itself. The paper quantifies why this matters even when both designs use adaptation: against a monolithic device forced to spend the same total resources, the modular approach still ends up with a failure rate about 1.8 to 2.9 times lower, precisely because the modular machine can DISCARD its weakest patches while the monolithic one must keep them and let them drag down the whole device. Making the unit of failure small enough that rejecting one is cheap is the same isolate-and-discard discipline covered elsewhere on this site, where chopping a system into independently verifiable pieces converts a catastrophic failure into a bounded loss.

Adapt to the defect instead of demanding perfection. The second decision rejects the dichotomy between flawless chiplets and useless ones. When a defect breaks the local checks, the tool merges them into a larger combined check that encircles the defective region, restoring detection there, and reshapes the patch boundary when the defect is too close to the edge to be encircled. The crucial result is that this preserves the property that matters — an adapted patch still suppresses logical failure exponentially with its code distance, behaving like a defect-free patch of the same distance and simply costing more physical qubits. That is what converts a broken chip from waste into inventory. Refusing the choice between a perfect component and a discarded one, by degrading gracefully to a working configuration instead, is the same tolerate-and-adapt instinct covered elsewhere on this site, where systems route around a failed element rather than requiring every element to be sound.

Find the metric that actually predicts quality, and distrust the obvious one. Deciding which chiplets to keep requires a way to judge them, and the natural choice is to count how many broken qubits each has. The authors test that and find it measurably worse than the two indicators they propose — the adapted patch’s code distance, with the number of distinct minimum-size failure patterns as a tie-breaker. They also test and REJECT other plausible candidates, finding that the size of the largest defect cluster does not predict quality at all, and that the fraction of disabled qubits adds nothing beyond what the code distance already says. The same instinct appears again in how they decide whether a merely poor qubit should be disabled — they abandon the standard memory experiment because it structurally cannot reveal the damage a faulty qubit does, since such damage looks like repeated measurement errors that a memory experiment is blind to, and use a different experiment that can. Insisting on measuring the thing that actually predicts the outcome, rather than the proxy that is easiest to count, is the site’s most persistent lesson, covered elsewhere here in the performance-analysis pages that show a convenient proxy quietly misleading a whole field.

Keeping a chip that came out broken

From a defective grid to a scored, usable logical qubit

Adapting the surface code to defects and deciding whether the chiplet is worth keeping. Numbers from the paper's simulations.

Step 1 of 5

The chiplet comes off the line with defects

A chiplet holds a grid of data qubits with measurement qubits between them, enough for one logical qubit. Manufacturing leaves some qubits or links broken — around 2 percent by one estimate for current devices — scattered unpredictably, because the variation is random and every chip ends up with its own unique profile.

the paper studies two defect models, one where only the links between qubits fail and one where links and qubits fail at the same rate
the second is harsher, and its yields are correspondingly lower

Why it works

Checks cannot be measured around a defect, so errors there go undetected → merging the broken checks into a larger one that encircles the defect restores detection → the logical failure rate resumes falling exponentially with code distance, which is the property the whole design exists to provide.
An adapted patch behaves like a defect-free patch of the same code distance → so a defective chiplet is not damaged goods but simply a more expensive way to buy a given distance → chiplets that would have been scrapped become usable inventory.
Small chiplets can be tested individually before assembly → bad ones are rejected without contaminating anything else → unlike a monolithic device, which must keep its weak regions and suffers about 1.8 to 2.9 times the failure rate at matched cost.
Larger chiplets pass the quality test more often but waste more qubits when rejected → the true cost, counting fabricated qubits including rejects, has a minimum at some size → picking that size per defect rate is what keeps overhead near 3 times instead of hundreds.
A defect-free patch is highly symmetric, so it admits more distinct minimum-size failure patterns → a defective patch of the same distance has fewer ways to fail → which is why, at the low error rates real machines aim for, defective patches often outperform perfect ones of equal distance.

What it costs (trade-offs and scope)

Adaptation reduces the defect penalty but does not remove it. Even with everything working, the extra cost is about 2 times the ideal at a 0.5 percent defect rate for the milder defect model and 5 to 6 times at 1 percent for the harsher one. The authors state plainly that keeping overhead below 2 times still requires driving the defect rate below about 0.5 percent, or below about 0.3 percent when qubits as well as links can fail — better fabrication remains necessary.
Logical operations between defective patches were not simulated. The analysis measures how well a patch STORES a logical qubit. Combining patches to perform operations can lose more code distance than either patch lost alone, especially when their deformed boundaries do not line up, and the authors say explicitly that it is only their speculation that the merged distance predicts the fidelity of those operations.
Constraining boundaries for those operations costs yield. Requiring patches to keep clean edges so they combine well reduces the fraction that pass — negligibly under the loosest constraint, but significantly under the strictest, so the architecture must choose how much freedom to demand.
Results come from simulation, with a simple notion of broken. Everything is measured in a simulator under a circuit-based noise model, not on hardware, and the main analysis labels each qubit or link simply faulty or not. Real devices are graded, which the authors address separately by finding cutoff fidelities, but the headline numbers use the binary model.
A defect-tolerant design can conflict with other error-mitigation needs. The freedom to swap the roles of data and measurement qubits improves yield, but some techniques for handling leakage errors also rely on swapping those roles and may not fit this design. Leakage is explicitly outside the paper’s scope.

The evaluation

The authors built an automated tool that adapts the rotated surface code to an arbitrary defect distribution and emits a measurement circuit for the Stim simulator, then ran simulations under a circuit-based noise model with non-defective qubits around 0.1 percent error, sampling 10000 shots per data point. They compare against the ideal defect-free case, against a defect-intolerant modular design that uses only flawless chiplets, and against a monolithic device at matched resource cost, under two defect models — links only, and links and qubits at the same rate.

Building logical qubits from imperfect hardware

Property	One large monolithic chip	Chiplets, defect-free only	Chiplets plus super-stabilizers
Can reject bad units
Can use a defective unit
Exponential protection
Overhead at 1 percent defects
Cost for a real algorithm

Overheads count every physical qubit fabricated, including those on rejected chiplets. The algorithm case is Shor's algorithm on 2048-bit integers, needing a 226 by 63 grid of distance-27 patches and about 25 billion error-correction cycles; against the defect-intolerant modular design, super-stabilizers reduce the resource overhead by 45 times at a 0.1 percent defect rate and by more than 100000 times at 0.3 percent.Underlined values explain themselves when clicked.

Where this stops working

What to keep in mind

Read the scope precisely. This is a simulation study, not a hardware demonstration, and its main analysis uses a deliberately simple notion of defect where each qubit or link is labelled broken or not — real devices are graded, which the authors handle separately by deriving cutoff fidelities for when a merely poor qubit should be disabled rather than kept. The analysis measures how well a patch STORES a logical qubit; performing operations by combining patches can lose more code distance than either patch lost individually, particularly when deformed boundaries do not align, and the authors state explicitly that it is only their speculation that the merged distance predicts the fidelity of those operations. Constraining boundaries so patches combine well costs yield, negligibly under the loosest constraint and significantly under the strictest. The freedom to swap data and measurement qubit roles improves yield but may conflict with techniques for handling leakage errors, which are out of scope. Most importantly, the paper does not claim adaptation makes fabrication quality unimportant — it says the opposite, that holding the overhead below 2 times still requires pushing the defect rate under about 0.5 percent, or 0.3 percent when qubits as well as links can fail. Within that scope the lessons are sharp and general: make the unit of failure small enough that discarding one is cheap; adapt to the defect rather than demanding a perfect component; verify that your quality metric actually predicts the outcome instead of trusting the easiest thing to count; and choose the module size that balances yield against waste rather than assuming bigger or smaller is better.

Background

Small units you can discard, graceful adaptation, and a metric that actually predicts

This paper sits in the site’s quantum computing and architecture cluster and rhymes with several ideas covered elsewhere on this site. Its structural move — break the machine into small chiplets so each can be judged and rejected on its own — is the same isolate-so-failure-is-bounded discipline the modularity and fault-tolerance pages apply, and its measured advantage over a monolithic device at matched cost comes precisely from being able to DISCARD a weak unit rather than carry it, which is the same argument the pages on decomposing a system into independently checkable pieces make. Its second move, adapting the error-correcting code around whatever defects a chiplet has rather than demanding a flawless one, is the same refuse-the-perfect-or-useless-dichotomy instinct the graceful-degradation and redundancy pages share, and it converts scrap into inventory in the same spirit as the pages that keep a slower but valid path available instead of failing. Its balancing of chiplet size — larger units pass more often but waste more when rejected, so an optimum exists per defect rate — is the same crossover-threshold reasoning the machine-learning-in-the-kernel page performs when it measures the batch size below which acceleration cannot pay, and the same tuning tension the zero-knowledge-proof page meets in choosing a window size. Most of all, its insistence on validating the quality metric — testing and rejecting the obvious proxy of counting broken qubits, discarding other plausible indicators that predicted nothing, and abandoning a standard experiment because it is structurally blind to the damage being studied — is the site’s most persistent lesson, the one the performance-analysis page makes when it shows a convenient proxy misleading an entire field. Together they make this a case study in designing the hardware and the algorithm for each other rather than in sequence.

If you remember only three things

1. Fault-tolerant quantum computing needs over a million high-quality physical qubits, but fabrication cannot deliver them — a superconducting qubit is built around features smaller than the light used to pattern them, so frequencies drift and collide and impurities appear, leaving roughly 2 percent of qubits broken on current devices. This is worse than lost capacity, because error correction works by measuring checks that reveal where errors happened, and around a defect those checks cannot be measured. Errors there go undetected, so adding more physical qubits stops improving the logical qubit and the exponential protection that justifies the whole enterprise disappears.
2. The paper combines two strategies and then measures them. Building the machine from many small CHIPLETS, one logical qubit each, allows every unit to be tested and rejected before assembly — impossible on a monolithic chip, where a bad region must be carried and drags the device down, costing about 1.8 to 2.9 times the failure rate at matched resources. Rather than discarding imperfect chiplets, an automated tool adapts the code to whatever defects they have, merging the checks a defect has broken into larger SUPER-STABILIZERS that encircle it and reshaping the patch boundary when a defect sits too near the edge. The key result is that an adapted patch still suppresses failure exponentially, behaving like a defect-free patch of the same code distance and merely costing more qubits.
3. Choosing which chiplets to keep needs a quality metric, and the authors show the obvious one — counting broken qubits — predicts worse than their two cheap indicators, the adapted code distance plus the number of distinct minimum-size failure patterns as a tie-breaker; other plausible metrics predicted nothing at all. With chiplet size chosen to balance yield against wasted qubits, overhead falls from 336 times to under 3 times at a 1 percent defect rate, and beats the defect-intolerant approach by 45 times for a real algorithm. The transferable lessons: make the unit of failure small enough to discard cheaply, adapt to defects instead of demanding perfection, and verify that your quality metric truly predicts the outcome.

Check yourself

Check your understanding

1. A broken qubit is described as far worse than simply having fewer qubits. Predict why a fabrication defect is so damaging to quantum error correction.
2. The authors test the obvious way to judge a chiplet — counting how many broken qubits it has — and reject it. Predict what they use instead and why it matters.
3. Larger chiplets are more likely to pass the quality test, yet the paper says bigger is not simply better. Predict what sets the optimal chiplet size.
4. To decide whether a poor-but-working qubit should be disabled, the authors abandon the standard memory experiment. Predict why that experiment could not answer the question.

Sources

Codesign of quantum error-correcting codes and modular chiplets in the presence of defects (arXiv:2305.00138) — ASPLOS 2024; the full 16-page paper, read in full for this explainer.
ACM Digital Library (DOI 10.1145/3620665.3640362) — published version.
Super-stabilizer adaptation tool and demo notebook (GitHub) — the authors’ released code for adapting the surface code to arbitrary defect distributions.